Memory and I/O optimized rectilinear steiner minimum tree routing for VLSI
نویسندگان
چکیده
منابع مشابه
An Efficient Rectilinear Steiner Tree Algorithm for Vlsi Global Routing
As we move to deep sub-micron designs below 0.18 microns, the delay of a circuit, as well as power dissipation and area, is dominated by interconnections between logical elements (i.e. transistors)[1]. The focus of this paper is on the global routing problem. Both global and channel routing are NP-hard[2]; therefore, all existing solution methodologies are heuristics. The main aim is to develop...
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ژورنال
عنوان ژورنال: International Journal of Electrical and Computer Engineering (IJECE)
سال: 2020
ISSN: 2088-8708,2088-8708
DOI: 10.11591/ijece.v10i3.pp2959-2968